I think AMD did very well with its 64-bit extensions to the x86 ISA. IBM also did well with its PPC 970 chip that's designed from scratch to do 32- and 64-bit natively with no performance hit in either mode. The Itanium is a different monster, a 64-bit chip that has to run 32-bit code in emulation -- a disaster when general computing is still mostly 32-bit (although they do well in supercomputers).
I think AMD did very well with its 64-bit extensions to the x86 ISA.
Ah, you're talking about architectual issues, and I'm talking about physical issues.
Just imagine a nice medium size burg. Then imagine it, if all the roads and paths were made with double the width. Assuming that the lot sizes were the same, the town would grow, would it not?
And when you are driving your car at the same speed as before (i.e. the limits of physics), it takes you longer to go from one corner of the bigger town to the other corner, right?
It's the same way in chips, especially if they are constrained not by block size, but by wiring considerations. And of course, those blocks are going to grow in size, because now they have to process 64 bits, not 32 - some will double in size.
Now, the fabs do nice things like give us physical designers more layers to play with, and if we lay out things nicely, we minimize the cost of these double-wide bit lanes. But bigger they are, and bigger = lower frequency.
On the other hand, now you can gain some speed back by taking advantage of 64 bit calculations in your OS and applications. So in some cases it's a wash, or if 64-bit calcs really speed things, up, a win. But it still has lower frequency than a smaller design.