Block diagram of the Power8 chip
Posted on 08/29/2013 1:02:09 PM PDT by Ernest_at_the_Beach
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Article from the Brits...
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If single-thread performance is the most important thing for a piece of work, a core or set of cores will step down the threading automagically and run it with fewer processor threads. The Power8 core, said Stuecheli, has twice as much L1 data cache at 64KB compared to its predecessor (L1 instruction cache remains the same). Data buses from L1 to L2 cache on the die are now twice as wide at 64 bytes. The core has larger issue queues, improved branch prediction, can handle twice as many data cache misses, and has significantly beefed up prefetching of instructions and data. Add it all up, and at a 4GHz clock speed, a Power8 chip will yield about 1.6 times the single-threaded performance of a Power7 chip from 2010.
Block diagram of the Power8 chip
Each core has 512KB of SRAM memory etched right near it
(Excerpt) Read more at theregister.co.uk ...
FYI
More power! I need more power!!
So, do I need a 2000 watt PSU? You know, for my 64 gig of RAM and my 3 gig GPU......
CPUs are so old school.
I believe the Power8 also has a compass in the stock and this thing that tells time.
bump
My coffee pot doesn't pull that kind of power...
/johnny
You talking BIOS timer or an actual GPS-based stratum 1 clock?
This is ridiculous. Obviously this isn’t intended for the home user market. These will likely go into the new generation of IBM mainframes.
These babies are headed for the cloud servers.
They'll go in the standard x86/AMD64 machines for sure. With that much horsepower, the bottlenecks at the disk array controller and your standard 1 GBps NIC will need to be overcome. I'm thinking of a box with RAID50 SAS SSDs and a 10 GB LC-to-LC fiber uplink to some BIG Cisco stuff.
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