Posted on 07/14/2022 11:10:15 AM PDT by FarCenter
STMicroelectronics and GlobalFoundries announced they have signed a memorandum of understanding to build a 300-mm semiconductor manufacturing facility that will help develop the fully depleted silicon-on-insulator (FD-SOI) technology ecosystem. The new facility will represent a multi-billion–euro investment and is expected to create about 1,000 jobs.
The jointly operated fab will support GlobalFoundries’ 22FDX FD-SOI process technology and STMicroelectronics’ technology roadmap down to 18 nm for automotive, industrial, IoT, and communications infrastructure applications, companies said.
The facility, which will be adjacent to STMicroelectronics’ existing 300-mm manufacturing site in Crolles, France, is set to reach full capacity by 2026, with up to 620,000 300-mm chips per year. The breakdown will be as follows: about 42% for STMicroelectronics and about 58% for GlobalFoundries.
“This new manufacturing facility will support our $20 billion+ revenue ambition,” said Jean-Marc Chéry, president and CEO of STMicroelectronics, at a press conference held today (July 11). Moving to the strengths of the collaboration, Chéry said, “We have a long legacy partnership with GlobalFoundries. We strongly promote the FD-SOI ecosystem, and by doing it together, we will reach a bigger scale [and] go faster than everybody in Europe.”
Thomas Caulfield, CEO of GlobalFoundries, confirmed, “We have a common belief in the FD-SOI platform. ...”
Refusing to divulge the exact amount, partners indicated that the project will represent a multi-billion–euro investment and will receive “significant” financial support from the State of France. The French media sites Le Monde and Le Figaro, however, speak of an estimated investment of €5.7 billion.
The project remains subject to the execution of definitive agreements and various regulatory approvals, including from the European Commission’s Directorate-General for Competition, and to the completion of the consultation with STMicroelectronics’ French Works Council.
(Excerpt) Read more at eetimes.eu ...
That’s some big chips.😳
300mm (30 cm or 11 inch transistors / microprocessors) are, well, pretty much late 1940s / early 1950s technology, no?
300-mm - is that 300 square mm in area, as in a 17mmx17mm die?
Started at 1 1/4 inch, ended at 200 mm (IBM w/notch)
I remember back in the 1990s when the technology media was saying that we would never be able to make a chip with smaller than 25 nanometer traces due to physics limits.
Jinx. I’m your friend, bro.
GF-STM have abandoned any process smaller than 14nm.
There is still plenty of demand for older technology.
Both IBM and AMD abandoned GF on 7nm as they couldn’t get it to work.
300 mm is the diameter of the silicon wafer. After lithography and other processing steps, the wafer is cut into the individual chips. The chips are then tested and bonded into packaging suitable for mounting on circuit boards. These latter steps are usually done in Southeast Asia, even for wafers from fabs in the US and Europe.
300mm refers to the size of the silicon wafer on which the chips will be created. A 300mm wafer will yield 640 ‘dies’ or individual chips per wafer.
https://en.wikipedia.org/wiki/Wafer_(electronics)
200mm was passed by 300mm in 2002, which was two decades ago. 450mm is the newest proposed standard size.
Silicon wafers don’t show up until 1960....
~12” wafers.
#12 Those are the new cd’s. They will hold the new 8k movies...
Nope. The last optical drive format is BluRay - everything after is pure digital or flash.
Roommate at Hp built GaAs FETs up to a whopping 18GHz.
The building pulling GaAs became an EPA super fund site
at the bottom of Page Mill. Seems some arsenic got loose.
Long ago...
200mm was passed by 300mm in 2002
I’m an old fart.
Have not checked lately but Moore’s law used to work well.
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