Here comes the KiloCore chip with wormhole routing

elektormagazine.com ^ | 6/28/2016 | Jan Buiting

[Elderberry]

A team from Davis University, California, has designed a processor with 1000* cores, boasting a throughput rate of 1.78 trillion instructions per second and containing 621 million transistors.

As opposed to a number of other attempts, some reaching 300 or so processors, the KiloCore chip has been fabricated and run; it was built by IBM (who else) using its 32-nm PD-SOI CMOS technology (what else).

The basic architecture used is MIMD (multiple instruction/multiple data) and each of the seven-stage-pipelined cores has a 72-instruction set, single instruction/cycle. None of the instructions is ‘algorithm-specific’ – setting the KiloCore apart from GPU-class devices. The terrific throughput is achieved at a clock speed of a mere 1.78 GHz, at 1.1 V. Running at 0.84 V and 1 GHz the beast consumes 13.1 W, while peak power efficiency of 5.8 pJ/Op is quoted at 0.56 V and 115 MHz.

Each core is independently powered and can shut down to leakage-only power if it has no task to perform. Rather than a cache architecture, every processor can store instructions and data in a hierarchy of locations; local memory, one or more nearby processors, on-chip independent memory modules, or off-chip memory.

The ‘wormhole’ routing employed implies, among others, that messages from an adjacent or nearby core will be routed via the ‘circuit’ network; those from further away in the processor matrix will travel via the packet network. If that’s a veritable can of worms to programmers remains to be seen. Each core has north-south-east-west comms buffers plus a fifth channel for host-processor traffic; maximum throughput is 45.5 Gbps per router and 9.1 Gbps per port at 1.1 V.

* as a niggling detail, K in my computerized editor's dictionary is for kilo = 1024. Sure, k is also for kilo, but meaning 1000 in old money, like in kHz.

[Rebelbase]

We’ll call the first one Hannibal.

[Rebelbase]

AI has already caught on to the negative inference of the term Skynet. It will appeal to the masses by calling itself Skynyrd.

[Darth Reardon]

Perhaps that says more about what we have today being bloated.

This thing has a 72 count instruction set. That’s less than the 8086 started with.

[BraveMan]

The Revenge: Timo Boll vs. KUKA Robot

[Edward.Fish]

There are old single core chips with 184 million tranistors (Pentium 4), and six core i7 chips with close to 2 billion. The 621 million transistor count sounds low for a 1000 core chip. We used to worry about the overhead of managing that many cores. Has that problem been solved?

The low transistor count is from this: each of the seven-stage-pipelined cores has a 72-instruction set, single instruction/cycle.
I think the best thing to do WRT managing that many cores is to treat them as a resource (like memory) and apply management/scheduling to them... it'd probably help to have several reserved for OS usage (rather like the registers on [IIRC] MIPS machines).

[ronnietherocket3]

There are old single core chips with 184 million tranistors (Pentium 4), and six core i7 chips with close to 2 billion. The 621 million transistor count sounds low for a 1000 core chip. We used to worry about the overhead of managing that many cores. Has that problem been solved?

Based on low power consumption, and only having 72ops, I am guessing that they skipped branch prediction, floating point units, special function units, vector processing units and a large number of other things that are virtually necessary on a modern CPU or GPU.

They did good work here and their research will probably bear fruit in the 10-20 year timeframe. It may be interesting if some of the cores were general purpose and others were algorithm specific and a hardware scheduler could look ahead a few thousand ops and assign to a processor based on the operations being executed. For example, some applications run lots of threads were some of the threads handle sockets and comms and other threads are heavy on math. By specially designing cores throughput could go up with out having lots of useless transistors leaking current.

[7MMmag]

>>>> Sure haven’t seen a FReeper After Action report in many a year. <<<<

Software glitch gives away the game!

We can only trust ourselves...

And I am not you. Think about THAT.

I see you have begun to have thoughts of your own, Mr. Anderson, to question things as they are, even figure some things out...

But your friend Morpheus cannot help you now.