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AMD's Naples: Outspecing and outperforming $5000 CPU from Intel
Fudzilla ^
| 09 March 2017
| Fuad Abazovic
Posted on 03/11/2017 10:19:46 AM PST by Ernest_at_the_Beach
AMD has given details of Naples and talked about its support at the Open Compute conference and it also shared a few performance numbers of a dual socket Naples with 64 core and 128 threes versus Intels latest dual socket Xeon E5-2699A.
Intels latest dual socket Xeon E5-2699A is commercially available from a major server OEM. Intel has 22 cores with 44 threads support per socket. A dual socket Intel system supports total 88 threads while the dual socket Naples supports 128 threads.
Intel's platform supports total eight memory channels while Naples supports 16, twice the number. Total memory capacity based on 16GB DIMMs on Naples system is 512GB while the Intel E5 28699A V4 supports 384 GB. Even memory speed is on AMDs side as Naples supports 2400 MHZ DDR4 memory while Intel supports 1866 MHz.
The total number of PCIe gen 3 lanes to the CPU is 8x16=128 with Naples dual socket System versus 2x40=80 with Intel.
AMD showcased a few demos and the first compared two systems in seismic analysis. This is a computationally intensive analysis involving iterations of 3D wave equations and it taxes the whole system including cores, memory and I/O. It is used to locate natural resources deposits - read oil and gas.
In a billion sample grid, and in a 10 Iterations demo seismic analysis where lower is better, AMD's Naples dual socket system is 2x faster finishing within 18 seconds, compared to the 35 seconds Intel needed. That's not all, AMD disabled 20 cores to give a better sense how 44 cores of Zen would compare to 44 cores on Intel E5 28699A V4. AMD even de-clocked the memory for the demo, making it an even 1866 MHz at both systems.
When AMD enables all 64 cores and 2400 MHz memory, dual Naples finishes the task approximately 2.5 times faster or in just 14 seconds, compared to Intel, that takes 35 seconds.
The third demo used a four billion sample grid with 10 Iterations workload in seismic analysis, and Intels system didnt even want to load the demo due to insufficient memory. AMD finished this task in 54 seconds. AMD claims that Naples will get you even higher scores when matched with Radeon Instinct compute cards. AMD claims that the computing power of one human brain is within Naples and four Instinct cards, but we would not go that far.
It is hard to put in perspective how computationally intensive this task is and the testing was not done by a third party such as Fudzilla. From what weve seen, at least in these selected demos, AMD Naples dominates the Intel E5 28699A V4 dual core system. Bear in mind that Intels highest performing 44 core processor currently officially sells for $4938.00 and it is based on Broadwell architecture in 14nm and that the tested system had two of them.
We expect that AMD plans to offer server / data center products at very competitive pricing, which will give it a lot of edge and probably help it to win a lot of business in this insanely profitable market. So it is not all about Ryzen, Naples has a lot of potential too.
More in this category:
« Naples 32 core server chip announced
MediaTek sticks to TSMC »
TOPICS: Business/Economy; Computers/Internet
KEYWORDS: hitech; naples; ryzen
To: ShadowAce; SunkenCiv
Ignore the links ....,will give a 404 error but the article has some very useful links for those interested.
Also some slides at the original article...I'll show this one:
2
posted on
03/11/2017 10:51:12 AM PST
by
Ernest_at_the_Beach
(The swamp is worse than most can imagine.)
To: zot
I think this is the AMD chip that Greyman was talking about Tuesday evening.
3
posted on
03/11/2017 10:54:01 AM PST
by
GreyFriar
(Spearhead - 3rd Armored Division 75-78 & 83-87)
To: All
Another slide:
4
posted on
03/11/2017 11:02:32 AM PST
by
Ernest_at_the_Beach
(The swamp is worse than most can imagine.)
To: Ernest_at_the_Beach
I want one, or a pair anyway...(of Naples that is). I have an application at work that could light it up and make use of basically everything it’s got... (digital signal processing of big data sets in real time)
5
posted on
03/11/2017 11:09:02 AM PST
by
ThunderSleeps
(Doing my part to help make America great again!)
To: Ernest_at_the_Beach
An blog article from some months ago :
The New Citavia Blog
Speculation about future CPUs and GPUs based on patents, patches, leaks.
Monday, February 1, 2016
AMD Zeppelin CPU codename confirmed by patch and perhaps 32 cores per socket for Zen based MPUs, too
The Zeppelin codename, first mentioned on a leaked slide shown by Fudzilla, has been identified as a "family 17h model 00h" CPU by a patch on LKML.org. The interesting parts of the patch are:
AMD Zeppelin (Family 17h, Model 00h) introduces an instructionsretired performance counter which indicated byCPUID.8000_0008H:EBX[1]. And dedicated Instructions Retired register(MSR 0xC000_000E9) increments on once for every instruction retired.
There might even be a meaning behind the similarity of parts of the "Zen" and "Zeppelin" codenames.
An older patch on the same mailing list also gives a little more info about Zen:
On AMD Fam17h systems, the last level cache is not resident in Northbridge. Therefore, we cannot assign cpu_llc_id to same value as Node ID (as we have been doing currently)
We should rather look at the ApicID bits of the core to provide us the last level cache ID info. Doing that here.
The most interesting part describes the way, how the last level cache (LLC) ID is being calculated for Zen based MPUs:
+ core_complex_id = (apicid & ((1 << c->x86_coreid_bits) - 1)) >> 3;
+ per_cpu(cpu_llc_id, cpu) = (socket_id << 3) | core_complex_id;
"Core complex" should be similar to "compute unit" and has been used in some AMD patents already. The expression marked in red means a shift right by 3, which equals a division by 8. So with two logical cores per physical core due to SMT, a core complex should contain four Zen cores and a shared LLC.
The next line shows the socket ID being shifted left by 3, leaving 3 bits for the core complex ID, which suggests a maximum number of eight core complexes per socket, or 32 physical cores. This number should first be seen as a placeholder, but we've already seen rumours mentioning that many cores.
Matthias Waldhauer at 1:54 AM
6
posted on
03/11/2017 11:16:40 AM PST
by
Ernest_at_the_Beach
(The swamp is worse than most can imagine.)
To: Ernest_at_the_Beach
Sounds great, but will it play Crysis 3 in 4k at 165hz, with all settings maxed? /s
7
posted on
03/11/2017 11:28:01 AM PST
by
catbertz
To: ThunderSleeps
I want something much smaller but so I can browse and cut and paste much faster....my old FX8120 gets bogged when I have a lot of windows open with Ubuntu...Gnome Zoom up High.
8
posted on
03/11/2017 11:30:52 AM PST
by
Ernest_at_the_Beach
(The swamp is worse than most can imagine.)
To: catbertz
Heh! I happen to be playing Crysis 3 right now.
9
posted on
03/11/2017 11:33:27 AM PST
by
RandallFlagg
(Vote for your guns!)
To: Ernest_at_the_Beach
Any info on price point and availability?
To: ThunderSleeps
11
posted on
03/11/2017 11:49:28 AM PST
by
Ernest_at_the_Beach
(The swamp is worse than most can imagine.)
To: taxcontrol
I have no info but Naples is suppose to launch Q2.
Ryzen is out and the 1800x competes very well with the top Broadwell 8 core $1050 chip at $499
So if the cut the server Intel prices by 50 %....They ought to gt some business....
The power consumption drops at lot too!
12
posted on
03/11/2017 12:02:09 PM PST
by
Ernest_at_the_Beach
(The swamp is worse than most can imagine.)
To: All
13
posted on
03/11/2017 12:09:05 PM PST
by
Ernest_at_the_Beach
(The swamp is worse than most can imagine.)
To: Ernest_at_the_Beach
Yes, I was looking at the Ryzen as my next upgrade - 8 core 64 gb VMware player server. It is for a multi VM lab environment.
But if the Naples is just around the corner, I think I will hold off and see what the June time frame brings to the market.
To: GreyFriar
Yes, I also think this is the chip Greyman was talking about. Impressive stats in this article, though I don’t understand most of them :)
15
posted on
03/11/2017 4:39:44 PM PST
by
zot
To: taxcontrol; ThunderSleeps; GreyFriar; zot
16
posted on
03/13/2017 9:41:20 AM PDT
by
Ernest_at_the_Beach
(The swamp is worse than most can imagine.)
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3 comments:
It appears that CERN has confirmed that Zeppelin will offer up to 32 cores and 8 DDR4 channels.
http://www.hardwareluxx.de/index.php/news/hardware/prozessoren/38096-forschungszentrum-cern-bestaetigt-zen-serverprozessoren-mit-32-kernen.html
I don't know if the speaker at this presentation is correct, but he states that AMD will be using MCM packaging to put 32 cores in a single socket. This implys that the Zeppelin die is a 16 core design with 4 DDR4 channels.
Breaking this down into the core complexes you've described that would give us 4 per die for a total of 8.
Extrapolating from there to Summit Ridge we should be looking at an 8 core chip using two core complexes and offering 2 DDR4 channels in line with the rest of the AM4 platform. This also means that Summit Ridge will use a different die than AMD's Zeppelin.
Again this all assume that Zeppelin is a 2 die MCM. It could alternatively be constructed using four Summit Ridge dies to put 32 cores and 8 DDR4 channels in a single socket.